发明名称 ADC calibration apparatus
摘要 An analog-to-digital (ADC) calibration apparatus comprises a calibration buffer, a comparator and a digital calibration block. Each reference voltage is sent to a track-and-hold amplifier as well as the calibration buffer. The comparator compares the output from the track-and-hold amplifier and the output from the calibration buffer and generates a binary number. Based upon a successive approximation method, the digital calibration block finds a correction voltage for ADC offset and nonlinearity compensation. By employing the ADC calibration apparatus, each reference voltage can be calibrated and the corresponding correction voltage can be used to modify the reference voltage during an ADC process.
申请公布号 US8416105(B2) 申请公布日期 2013.04.09
申请号 US201113029754 申请日期 2011.02.17
申请人 LAI FANG-SHI JORDAN;CHANG CHIN-HAO;MHALA MANOJ M.;HSUEH HSU-FENG;LIN YUNG-FU;WENG CHENG YEN;TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LAI FANG-SHI JORDAN;CHANG CHIN-HAO;MHALA MANOJ M.;HSUEH HSU-FENG;LIN YUNG-FU;WENG CHENG YEN
分类号 H03M1/10 主分类号 H03M1/10
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