发明名称 Concurrent memory bank access and refresh request queuing
摘要 An apparatus and system associated with memory are disclosed herein. In various embodiments, an apparatus may include first circuitry configured to queue pending refresh requests for a plurality of memory banks; and second circuitry coupled to the first circuitry and configured to set a refresh flag in response to a determination that a number of queued pending refresh requests for a memory bank from the plurality of memory banks exceeds a predetermined number. Other embodiments may be disclosed and/or claimed.
申请公布号 US8417883(B2) 申请公布日期 2013.04.09
申请号 US201213436381 申请日期 2012.03.30
申请人 PROEBSTING ROBERT J.;INTELLECTUAL VENTURES I LLC 发明人 PROEBSTING ROBERT J.
分类号 G06F12/00;G11C7/06;G11C7/12;G11C7/18;G11C7/22;G11C8/08;G11C11/4076;G11C11/4091;H01L21/8242;H01L27/108 主分类号 G06F12/00
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