发明名称 |
Zener Diode Structure and Process |
摘要 |
A vertically stacked, planar junction Zener diode is concurrently formed with epitaxially grown FET raised S/D terminals. The structure and process of the Zener diode are compatible with Gate-Last high-k FET structures and processes. Lateral separation of diode and transistor structures is provided by modified STI masking. No additional photolithography steps are required. In some embodiments, the non junction face of the uppermost diode terminal is silicided with nickel to additionally perform as a copper diffusion barrier.
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申请公布号 |
US2013082330(A1) |
申请公布日期 |
2013.04.04 |
申请号 |
US201113250563 |
申请日期 |
2011.09.30 |
申请人 |
XIA WEI;CHEN XIANGDONG;BROADCOM CORPORATION |
发明人 |
XIA WEI;CHEN XIANGDONG |
分类号 |
H01L27/092;H01L21/60;H01L21/8238 |
主分类号 |
H01L27/092 |
代理机构 |
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