| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a memory controller capable of reducing the overall processing time of an SIMD type processor, which is used for predetermined processing such as image processing, in comparison with the conventional technique; and an SIMD type processor including the memory controller. <P>SOLUTION: Each time a read buffer RB0 transfers data to registers Rj of processor elements PE0 to PEN, a read buffer counter circuit 51 increments and outputs an address value C51. A loop register 52 stores a predetermined maximum address value. A comparator 53 compares the address value C51, which is output from the read buffer counter circuit 51, with the maximum address value C52; generates, when the address value C51 matches the maximum address value C52, a counter reset signal S53 that resets the read buffer counter circuit 51; and outputs the signal to the read buffer counter circuit 51. <P>COPYRIGHT: (C)2013,JPO&INPIT |
