| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce a memory cell area of a domain wall motion MRAM. <P>SOLUTION: A memory cell 200-1 includes a fixed layer 11, a magnetic recording layer 21, a reference layer 41, a tunnel barrier film 31, and a MOS transistor 51. A memory cell 200-2 includes a fixed layer 13, a magnetic recording layer 22, a reference layer 42, a tunnel barrier film 32, and a MOS transistor 52. Each of the fixed layers 11 and 13 has magnetization fixed in a first direction. Fixed layers 12 each having magnetization fixed in a second direction opposite to the first direction is bonded to the magnetic recording layers 21 and 22, respectively. The fixed layers 12 and a common bit line CBL are connected such that electrical connection between the fixed layers 12 and the common bit line CBL is undetachable. <P>COPYRIGHT: (C)2013,JPO&INPIT |
