发明名称 |
EXAMINING AN INTEGRATED CIRCUIT |
摘要 |
<p>A method for determining if a device on a pre-existing CMOS integrated circuit is a p-channel device or an n-channel device. The method comprises etching the contact etch stop layer (CESL) which occurs at different rates on the two different CESL types thus allowing the device type to be determined by examining how much non-etched material is left.</p> |
申请公布号 |
CA2849729(A1) |
申请公布日期 |
2013.04.04 |
申请号 |
CA20112849729 |
申请日期 |
2011.09.27 |
申请人 |
CHIPWORKS, INCORPORATED |
发明人 |
KLIBANOV, LEV;SZKARLAT, ROBERT;CAMPBELL, JEFFREY |
分类号 |
G01R31/28;G01R31/26;G01R31/307 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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