发明名称 |
Nonvolatile memory controller with scalable pipelined error correction |
摘要 |
A nonvolatile memory system includes a memory controller in communication with multiple memory dies through multiple memory interfaces. Multiple ECC blocks are provided to decode data from the multiple memory interfaces. ECC blocks are provided with a clock signal that may have a frequency that is lower than another clock signal that is provided to a host interface. |
申请公布号 |
US8413015(B2) |
申请公布日期 |
2013.04.02 |
申请号 |
US20090563455 |
申请日期 |
2009.09.21 |
申请人 |
CHENG STEVEN S.;GUTTA ARUNA;SANDISK TECHNOLOGIES INC. |
发明人 |
CHENG STEVEN S.;GUTTA ARUNA |
分类号 |
G11C29/00 |
主分类号 |
G11C29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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