发明名称 Memory device with boost compensation
摘要 A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit.
申请公布号 US8411518(B2) 申请公布日期 2013.04.02
申请号 US20100981031 申请日期 2010.12.29
申请人 JANARDAN DHORI KEDAR;SINHA RAKESH KUMAR;GULYANI SACHIN;STMICROELECTRONICS PVT. LTD. 发明人 JANARDAN DHORI KEDAR;SINHA RAKESH KUMAR;GULYANI SACHIN
分类号 G11C7/00 主分类号 G11C7/00
代理机构 代理人
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