摘要 |
PURPOSE: A FTT(Fast Fourier Transform) apparatus using a MRMDC(Mixed-Radix Multi-Path Delay Commutator) architecture for an OFDM(Orthogonal Frequency Division Multiplexing) system is provided to reduce the number of butterfly calculators by using a Radix-2 or Radix-4 algorithm. CONSTITUTION: A switch(111) divides a plurality of data rows inputted in a first stage into 4 different data paths and outputs the divided plurality of data rows. A Radix-2/4 butterfly unit(113) performs butterfly calculation according to Radix-2 algorithm or a Radix-4 algorithm based on 4 data rows. Multiplexers(115a,115b) select the Radix-2 algorithm or the Radix-4 algorithm. A commutator(116) divides 4 data rows outputted from the Radix-2/4 butterfly unit at a second stage into different 8 data paths for the butterfly operation and outputs the divided 4 data rows. |