发明名称 READ ARCHITECTURE FOR MRAM
摘要 PURPOSE: A read architecture for An MRAM is provided to reduce power consumption by not writing data in a read cell again after the data is read. CONSTITUTION: A multilevel sense amplifier includes a plurality of sense amplifiers(102) with each sense threshold and each sense output. A storage module(108) is connected to the multilevel sense amplifier and stores the sense output of a first set corresponding to a first read of a RAM cell and the sense output of a second set corresponding to a second read of the RAM cell. A determination module(110) determines the data state of the RAM cell by comparing the sense output of the first set with the sense output of the second set. [Reference numerals] (102A) Ratio A; (102B) Ratio B; (102C) Ratio C; (102D) Ratio D; (102E) Ratio E; (104) Cell; (106) Standard; (108) Storage module for SA output; (110) Determination logic : checking two or more outputs to be changed between two read cycles
申请公布号 KR20130031186(A) 申请公布日期 2013.03.28
申请号 KR20120022853 申请日期 2012.03.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 LIN KAI CHUN;YU HUNG CHANG;CHIH YUE DER
分类号 G11C11/15;G11C16/26 主分类号 G11C11/15
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