| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor package wiring board which can reduce warp of a semiconductor package due to a temperature change in an use environment or at the time of reflow mounting, and improve temperature cycle resistance of a solder connection part between the semiconductor package and a mounting substrate even when the semiconductor package is thinned. <P>SOLUTION: A semiconductor package wiring board 5 to which a semiconductor element 4 is connected and which is connected to a mounting substrate 2, comprises: a core layer 11 including at least an interlayer insulation layer 14 and a wiring layer 15 formed on a surface of the interlayer insulation layer 14; and an electrode pad 22 electrically and mechanically connected to the mounting substrate 2 via solder bumps 3. The semiconductor package wiring board 5 includes a stress relaxation layer 21 arranged closer to the core layer side than the electrode pad 22 and contacting the electrode pad 22. An average heat expansion coefficient of the interlayer insulation layer 14 of the core layer 11 in a plane direction at 25°C-165°C is not greater than 5.5×10<SP POS="POST">-6</SP>/°C, and an elastic modulus of the stress relaxation layer 21 at 25°C is not greater than 2.5 GPa. <P>COPYRIGHT: (C)2013,JPO&INPIT |
