发明名称 FLASH MEMORY CONTROLLER ADAPTIVELY SELECTING ERROR-CORRECTION SCHEME ACCORDING TO NUMBER OF PROGRAM/ERASE CYCLES OF FLASH MEMORY
摘要 A flash memory controller includes an encoding block, a decoding block and a control unit. The encoding block is utilized for encoding raw bits with a target forward error-correction (FEC) coding scheme selected from a plurality of candidate FEC coding schemes. The decoding block is utilized for decoding encoded bits with a target FEC decoding scheme selected from a plurality of candidate FEC decoding schemes, wherein the target FEC decoding scheme corresponds to the target FEC coding scheme. The control unit is coupled to the encoding block and the decoding block, and utilized for controlling a selection of the target FEC coding scheme utilized by the encoding block and a selection of the target FEC decoding scheme utilized by the decoding block according to a number of program/erase cycles of a flash memory.
申请公布号 US2013080857(A1) 申请公布日期 2013.03.28
申请号 US201113239425 申请日期 2011.09.22
申请人 LEE YAO-NAN;CHENG SHIN-SHIUAN 发明人 LEE YAO-NAN;CHENG SHIN-SHIUAN
分类号 H03M13/05;G06F11/10 主分类号 H03M13/05
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