| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an SRAM and a semiconductor integrated circuit capable of efficiently reducing power consumption. <P>SOLUTION: SRAM 100 comprises: a memory cell array 2; bit lines BLT and BLB; an equalization control circuit 3; and an equalization circuit 4. The bit lines BLT and BLB are connected to the memory cell array 2. The equalization circuit 4 electrically connects or disconnects between the bit line BLT and the bit line BLB. The equalization control circuit 3 is connected with a power supply voltage VDD and a ground voltage GND, and outputs an equalization signal EQ that controls the ON/OFF of the equalization circuit 4. When the bit line BLT and the bit line BLB are electrically disconnected from the power supply voltage VDD and the ground voltage GND, the equalization circuit 4 electrically connects between the bit line BLT and the bit line BLB according to the equalization signal EQ. <P>COPYRIGHT: (C)2013,JPO&INPIT |
