发明名称 Improvements in and relating to methods of manufacturing transistors
摘要 1,139,781. Planar transistors. ASSOCIATED SEMI-CONDUCTOR MFRS., Ltd. 7 April, 1966, No. 15612/66. Heading H1K. A deeper, lower-resistivity portion 6 of the base region is formed by diffusion through a first opening (4, Fig. 1) in an insulating layer 3, a contiguous shallower higher-resistivity base portion 11 is then formed by diffusion through a second opening (9, Figs. 3 to 6) in the insulating layer 3, and an emitter region 14 is subsequently formed by diffusion through the same second opening. A relatively thin insulating layer (13, Fig. 4) may be formed in the second opening during diffusion of the second base portion 11 and removed by etching without appreciably affecting the remainder of the thicker insulating layer 3. Ohmic contact material 20, 21 is deposited in further openings 18, 19 in insulating layers 8, 16 formed in the first and second openings, and one or both of these further openings may coincide with one or both of the first and second openings. All the openings are produced by photo-processing techniques. The method may be extended to the manufacture of a multiple-emitter transistor (Figs. 15 and 16)with ohmic contacts in the form of (possibly interdigitated) aluminium layers (23, 24) overlying the insulating layer (3) of silicon oxide. Reference has been directed by the Comptroller to Specification 1,018,763.
申请公布号 GB1139781(A) 申请公布日期 1969.01.15
申请号 GB19660015612 申请日期 1966.04.07
申请人 ASSOCIATED SEMICONDUCTOR MANUFACTURERS LIMITED 发明人 PRITCHARD JOHN CHARLES
分类号 H01L21/00;H01L21/22;H01L21/60;H01L27/082;H01L29/00;H01L29/02;H01L29/06;H01L29/73 主分类号 H01L21/00
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