发明名称 Interleaving data accesses issued in response to vector access instructions
摘要 A vector data access unit includes data access ordering circuitry, for issuing data access requests indicated by the elements to the data store, and configured in response to receipt of at least two decoded vector data access instructions, and one of the instructions being a write instruction. Data accesses are performed in the instructed order to determine an element indicating the next data access for each of said vector data access instructions. One of the next data accesses is selected to be issued to the data store in dependence upon an order in which the at least two vector data instructions were received. The position of the elements indicates the next data accesses relative to each other within their respective plurality of elements. A numerical position of the element indicating the next data access within the plurality of elements of an earlier instruction is less than a predetermined value.
申请公布号 US2013080737(A1) 申请公布日期 2013.03.28
申请号 US201113200656 申请日期 2011.09.28
申请人 REID ALASTAIR DAVID;ARM LIMITED 发明人 REID ALASTAIR DAVID
分类号 G06F15/80;G06F9/30;G06F15/82 主分类号 G06F15/80
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