发明名称 |
COMPOSITE LAYERED CHIP PACKAGE |
摘要 |
A composite layered chip package includes first and second subpackages that are stacked. Each subpackage includes a main body and wiring. The main body includes: a main part having a top surface and a bottom surface; first terminals disposed on the top surface of the main part; and second terminals disposed on the bottom surface of the main part. The first and second terminals are electrically connected to the wiring. The first and second subpackages are arranged in a specific relative positional relationship, different from a reference relative positional relationship, with each other. |
申请公布号 |
US2013075935(A1) |
申请公布日期 |
2013.03.28 |
申请号 |
US201113240048 |
申请日期 |
2011.09.22 |
申请人 |
SASAKI YOSHITAKA;ITO HIROYUKI;IIJIMA ATSUSHI;SAE MAGNETICS (H.K.) LTD.;HEADWAY TECHNOLOGIES, INC. |
发明人 |
SASAKI YOSHITAKA;ITO HIROYUKI;IIJIMA ATSUSHI |
分类号 |
H01L23/52 |
主分类号 |
H01L23/52 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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