发明名称 Clock domain crossing verification support
摘要 A computer-readable, non-transitory medium stores therein a verification support program that causes a computer to execute a procedure. The procedure includes first detecting a state change in a circuit and occurring when input data is given to the circuit. The procedure also includes second detecting a state change in the circuit and occurring when the input data partially altered is given to the circuit. The procedure further includes determining whether a difference exists between a series of state changes detected at the first detecting and a series of state changes detected at the second detecting. The procedure also includes outputting a determination result obtained at the determining.
申请公布号 US8407636(B2) 申请公布日期 2013.03.26
申请号 US20100962785 申请日期 2010.12.08
申请人 IWASHITA HIROAKI;FUJITSU LIMITED 发明人 IWASHITA HIROAKI
分类号 G06F17/50;G06F9/455 主分类号 G06F17/50
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