发明名称 Filter circuit
摘要 A filter circuit including first and second real filters of a zero-IF scheme. The first and second real filters receive an I component and a Q component separated from a reception signal, respectively; and a switch section for producing a complex filter by switchably connecting the first and second real filters through interconnection elements. The switch section further receiving a switching signal for connecting the first and second real filters, thereby switching from the zero-IF scheme to a low-IF scheme.
申请公布号 US8406357(B2) 申请公布日期 2013.03.26
申请号 US20080034619 申请日期 2008.02.20
申请人 YAMAZAKI DAISUKE;KOBAYASHI KAZUHIKO;OISHI KAZUAKI;FUJITSU LIMITED 发明人 YAMAZAKI DAISUKE;KOBAYASHI KAZUHIKO;OISHI KAZUAKI
分类号 H04B1/10 主分类号 H04B1/10
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