发明名称 Serial bus clock frequency calibration system and method thereof
摘要 A serial bus clock frequency calibration system and a method thereof are disclosed herein. The system utilizes a first frequency calibration device, a second frequency calibration device and a third frequency calibration device to share the same oscillator as so to perform multi-stage clock frequency resolution calibrations for different frequency-tuning ranges. This can bring an optimal frequency resolution, greatly reduce system complexity and save element cost.
申请公布号 US8407508(B2) 申请公布日期 2013.03.26
申请号 US20100884164 申请日期 2010.09.16
申请人 LEE WEI-TE;YANG SHIN-TE;HUANG WEN-MING;GENESYS LOGIC, INC. 发明人 LEE WEI-TE;YANG SHIN-TE;HUANG WEN-MING
分类号 H03D3/24 主分类号 H03D3/24
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