发明名称 Methods of forming a gate structure
摘要 A gate structure includes an insulation layer on a substrate, a first conductive layer pattern on the insulation layer, a metal ohmic layer pattern on the first conductive layer pattern, a diffusion reduction layer pattern on the metal ohmic layer pattern an amorphous layer pattern on the diffusion reduction layer pattern, and a second conductive layer pattern on the amorphous layer pattern. The gate structure may have a low sheet resistance and desired thermal stability.
申请公布号 US8404576(B2) 申请公布日期 2013.03.26
申请号 US201113053923 申请日期 2011.03.22
申请人 CHA TAE-HO;CHEONG SEONG-HWEE;CHOI GIL-HEYUN;KIM BYUNG-HEE;PARK HEE-SOOK;BAEK JONG-MIN;SAMSUNG ELECTRONICS CO., LTD. 发明人 CHA TAE-HO;CHEONG SEONG-HWEE;CHOI GIL-HEYUN;KIM BYUNG-HEE;PARK HEE-SOOK;BAEK JONG-MIN
分类号 H01L21/283 主分类号 H01L21/283
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