发明名称 Semiconductor device and manufacturing method thereof
摘要 Provided is a manufacturing method for an offset MOS transistor capable of operating safely even under a voltage of 50 V or higher. In the offset MOS transistor which includes a LOCOS oxide film, the LOCOS oxide film formed in a periphery of a drain diffusion layer, in which a high withstanding voltage is required, is etched, and the drain diffusion layer is formed so as to spread into a surface region of a semiconductor substrate located below a region in which the LOCOS oxide film is thinned. As a result, end portions of the drain diffusion layer are covered by an offset diffusion layer, whereby electric field concentration occurring in a region of a lower portion of the drain diffusion layer can be relaxed.
申请公布号 US8404547(B2) 申请公布日期 2013.03.26
申请号 US20090510858 申请日期 2009.07.28
申请人 KITAJIMA YUICHIRO;YOSHINO HIDEO;SEIKO INSTRUMENTS INC. 发明人 KITAJIMA YUICHIRO;YOSHINO HIDEO
分类号 H01L21/336 主分类号 H01L21/336
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