摘要 |
A reset signal generating circuit according to an aspect of the present invention includes: a first signal line that transmits a reference reset signal to a first node; a second signal line that transmits an inverted signal of the reference reset signal to a second node; a first inverting circuit that outputs an inverter signal of the signal transmitted to the second node; and a control circuit that makes a reset signal active regardless of the reference reset signal, when a logical value of the signal transmitted to the first node does not match a logical value of the signal output from the first inverting circuit.
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