MULTI-PROCESSOR PARALLEL SIMULATION METHOD, SYSTEM AND SCHEDULER

摘要

Provided are a multi-processor parallel simulation method, system and scheduler. In the embodiment, the scheduler maps the debug interface information of a to-be-simulated processor requiring debugging to the scheduler during multi-processor parallel simulation, so that the scheduler can utilize a primary thread to debug the to-be-simulated processor requiring debugging via the debug interface of the to-be-simulated processor requiring debugging pointed by the debug interface information, thus achieving the debugging during multi-processor parallel simulation.