Percolation Tamper Protection Circuit for Electronic Devices

摘要

An integrated circuit employing a percolation tamper protection device includes a circuit housing with a die disposed in circuit housing. The die includes a volatile memory. A percolation tamper protection device that is connected to the volatile memory and also disposed in the circuit housing. The percolation tamper protection device includes a percolation gate which is biased in a conductive state. The percolation gate includes a first terminal that is connected to the volatile memory and a second terminal configured to be connected to a power supply. The percolation gate has a conductivity that varies proportional to pressure.