发明名称 |
INCREASING THROUGHPUT OF MULTIPLEXED ELECTRICAL BUS IN PIPE-LINED ARCHITECTURE |
摘要 |
Techniques are disclosed for increasing the throughput of a multiplexed electrical bus by exploiting available pipeline stages of a computer or other system. For example, a method for increasing a throughput of an electrical bus that connects at least two devices in a system comprises introducing at least one signal hold stage in a signal-receiving one of the two devices, such that a maximum frequency at which the two devices are operated is not limited by a number of cycles of an operating frequency of the electrical bus needed for a signal to propagate from a signal-transmitting one of the two devices to the signal-receiving one of the two devices. Preferably, the signal hold stage introduced in the signal-receiving one of the two devices is a pipeline stage re-allocated from the signal-transmitting one of the two devices.
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申请公布号 |
US2013070606(A1) |
申请公布日期 |
2013.03.21 |
申请号 |
US201113236109 |
申请日期 |
2011.09.19 |
申请人 |
ASAAD SAMEH;BREZZO BERNARD V.;KAPUR MOHIT;INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
ASAAD SAMEH;BREZZO BERNARD V.;KAPUR MOHIT |
分类号 |
H04L12/66;H04L12/26 |
主分类号 |
H04L12/66 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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