发明名称 DATA STORAGE CIRCUIT THAT RETAINS STATE DURING PRECHARGE
摘要 PURPOSE: A data storage circuit to maintain a state in a precharge process is provided to form a firm latching device with a differential data input and a reduced phase limit. CONSTITUTION: An input stage includes an input latching element(10) and a dual data line to output a data value and an inverted data value to an output stage. The input latching element outputs the data value by outputting a logic value of 1 to the dual data lines and discharging one of the dual data lines to 0. The output stage depends on the data value received from the dual data line and has a preset value. The output stage includes an output latching element(20) to maintain the preset value, two switching devices to update the output latching element, and an output unit. [Reference numerals] (AA) State; (BB) Unavailable; (CC,DD) Available(eval); (EE) Available(precharge)
申请公布号 KR20130028855(A) 申请公布日期 2013.03.20
申请号 KR20120087082 申请日期 2012.08.09
申请人 ARM LIMITED 发明人 FREDERICK JR MARLIN WAYNE;ALAM AKHTAR WASEEM;PAL SUMANA
分类号 G11C7/12;G11C7/10;G11C7/22 主分类号 G11C7/12
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