发明名称 Interface engineering to optimize metal-III-V
摘要 <p>Techniques for fabricating self-aligned contacts in III-V FET devices are provided. In one aspect, a method for fabricating a self-aligned contact to III-V materials includes the following steps. At least one metal is deposited on a surface of the III-V material. The at least one metal is reacted with an upper portion of the III-V material to form a metal-III-V alloy layer which is the self-aligned contact. An etch is used to remove any unreacted portions of the at least one metal. At least one impurity is implanted into the metal-III-V alloy layer. The at least one impurity implanted into the metal-III-V alloy layer is diffused to an interface between the metal-III-V alloy layer and the III-V material thereunder to reduce a contact resistance of the self-aligned contact.</p>
申请公布号 GB201302000(D0) 申请公布日期 2013.03.20
申请号 GB20130002000 申请日期 2013.02.05
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人
分类号 主分类号
代理机构 代理人
主权项
地址