发明名称 Techniques for buffering single-ended and differential signals
摘要 A circuit comprises first and second differential pairs and first and second switch circuits. The first differential pair includes first and second transistors operable to generate a first output signal based on a first input signal in a single-ended mode. The second differential pair includes third and fourth transistors operable to generate a second output signal based on a second input signal in the single-ended mode. The first switch circuit is operable to block current through the second transistor in a differential mode. The second switch circuit is operable to block current through the third transistor in the differential mode. The first and the fourth transistors are operable to generate a third output signal based on a third input signal in the differential mode.
申请公布号 US8400186(B1) 申请公布日期 2013.03.19
申请号 US201213401562 申请日期 2012.02.21
申请人 WANG XIAOBAO;SUNG CHIAKANG;HUANG JOSEPH;NGUYEN KHAI;ALTERA CORPORATION 发明人 WANG XIAOBAO;SUNG CHIAKANG;HUANG JOSEPH;NGUYEN KHAI
分类号 H03K19/094 主分类号 H03K19/094
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