发明名称 |
Method and apparatus for supporting run-time reconfiguration in a programmable logic integrated circuit |
摘要 |
Method and apparatus for generating an implementation of a program language circuit description for a programmable logic device (PLD) is described. In one example, the program language circuit description is analyzed to identify constructs indicative of dynamic function re-assignment. A hardware description of the program language circuit description is generated. The hardware description includes a plurality of implementations responsive to the identified constructs. Physical implementation data is generated from the hardware description. The physical implementation includes a plurality of partial configurations for the PLD based on the respective plurality of implementations in the hardware description.
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申请公布号 |
US8402409(B1) |
申请公布日期 |
2013.03.19 |
申请号 |
US20060373744 |
申请日期 |
2006.03.10 |
申请人 |
JANNECK JORN W.;PARLOUR DAVID B.;SCHUMACHER PAUL R.;XILINX, INC. |
发明人 |
JANNECK JORN W.;PARLOUR DAVID B.;SCHUMACHER PAUL R. |
分类号 |
G06F17/50;G06F9/45 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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