发明名称 Memory system with error correction and method of operation
摘要 A method is provided for error correction of a memory. The method includes: providing a first memory and a second memory; initiating a read operation of the first memory to retrieve data; performing an error correction code (ECC) processing on the data, wherein the ECC processing for determining that at least a portion of the data is erroneous and for providing corrected data; and determining if an address of the erroneous data is stored in the second memory, if the address of the erroneous data is stored in the second memory, storing the corrected data in the second memory, and if the address of the erroneous data is not stored in the second memory, storing the address in the second memory.
申请公布号 US8402327(B2) 申请公布日期 2013.03.19
申请号 US20080260727 申请日期 2008.10.29
申请人 PELLEY, III PERRY H.;HOEKSTRA GEORGE P.;WILSON PETER J.;FREESCALE SEMICONDUCTOR, INC. 发明人 PELLEY, III PERRY H.;HOEKSTRA GEORGE P.;WILSON PETER J.
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址