发明名称 Semiconductor storage device and its cell activation method
摘要 A semiconductor storage device in accordance with the present invention includes a first SRAM cell that stores data, and a word line circuit that outputs a first control signal used to activate the first SRAM cell. The word line control circuit gradually raises the voltage level of the first control signal from a substrate potential to a first power supply potential in a first activation period, maintains the voltage level of the first control signal at the first power supply potential in a second activation period subsequent to the first activation period, and raises the voltage level of the first control signal from the first power supply potential to a second power supply potential in a third activation period subsequent to the second activation period.
申请公布号 US8400850(B2) 申请公布日期 2013.03.19
申请号 US201113041566 申请日期 2011.03.07
申请人 TAKEDA KOICHI;RENESAS ELECTRONICS CORPORATION 发明人 TAKEDA KOICHI
分类号 G11C7/00 主分类号 G11C7/00
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