| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an output control scan flip-flop capable of reducing peak power consumption during a scan test without requiring a control signal. <P>SOLUTION: The output control scan flip-flop includes a scan flip-flop 203 which receives and outputs first data in normal operation and test data in shift operation synchronously with a clock signal; a scan flip-flop 204 which receives and outputs the data output from the scan flip-flop 203 in the shift operation synchronously with the clock signal; and a gating circuit which generates the data output from the scan flip-flop 203 in the normal operation as output data, and generates output data with a low logical value change rate on the basis of the data output from the scan flip-flops 203, 204 in the shift operation. <P>COPYRIGHT: (C)2013,JPO&INPIT |
