发明名称 SRAM CELL WRITABILITY
摘要 Systems and methods for detecting and improving writeability of a static random access memory (SRAM) cell. A bias voltage value corresponding to an operating condition, such as, a process, a voltage, or a temperature operation condition that indicates a cell write failure condition of an external SRAM array comprising the SRAM cell is generated. This bias voltage value is applied to word lines of SRAM cells in a model SRAM array. A first delay for a trigger signal rippled through the model SRAM array is detected and compared to a reference delay. A write assist indication is generated if the first delay is greater than or equal to the reference delay. Based on the write assist indication, a write assist is provided to the SRAM cell.
申请公布号 US2013064004(A1) 申请公布日期 2013.03.14
申请号 US201213551658 申请日期 2012.07.18
申请人 GARG MANISH;PHAN MICHAEL THAITHANH;QUALCOMM INCORPORATED 发明人 GARG MANISH;PHAN MICHAEL THAITHANH
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
主权项
地址