发明名称 Memory Systems and Methods for Dynamically Phase Adjusting A Write Strobe and Data to Account for Receive-Clock Drift
摘要 A memory system includes a memory controller that writes data to and reads data from a memory device. A write data strobe accompanying the write data indicates to the memory device when the write data is valid, whereas a read strobe accompanying data from the memory device indicates to the memory controller when the read data is valid. The memory controller adaptively controls the phase of the write data strobe to compensate for timing drift at the memory device. The memory controller uses read signals as a measure of the drift.
申请公布号 US2013064023(A1) 申请公布日期 2013.03.14
申请号 US201213670343 申请日期 2012.11.06
申请人 RAMBUS INC.;RAMBUS INC. 发明人 WARE FREDERICK A.
分类号 G11C7/22;G11C7/00 主分类号 G11C7/22
代理机构 代理人
主权项
地址
您可能感兴趣的专利