发明名称 APPARATUS AND METHODS EMPLOYING VARIABLE CLOCK GATING HYSTERESIS FOR A COMMUNICATIONS PORT
摘要 <p>An apparatus includes a communications port configured to communicate over a bus responsive to a clock signal and a clock signal generation circuit configured to generate the clock signal and to vary a gating hysteresis of the clock signal responsive to a control input, such as a communications transaction of the port. The clock signal generation circuit may be configured to vary the gating hysteresis of the clock signal based on an attribute of the transaction, such as an address of the transaction and/or a payload communicated in the transaction.</p>
申请公布号 EP2567302(A1) 申请公布日期 2013.03.13
申请号 EP20110720634 申请日期 2011.04.27
申请人 QUALCOMM INCORPORATED 发明人 HOFMANN, RICHARD, GERARD
分类号 G06F1/32;G06F1/04 主分类号 G06F1/32
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