发明名称 |
Tunnel transistor, logical gate comprising the transistor, static random-access memory using the logical gate and method for making such a tunnel transistor |
摘要 |
<p>A tunnel transistor (1) comprising a drain (2), a source (4) and a first gate (6) and a second gate (10) for controlling current between the drain (2) and the source (4), wherein the first sides (9,13) of respectively the first and the second gate dielectric material (7,11) are positioned substantially along and substantially contact respectively a first and a second semiconductor part (14,15).</p> |
申请公布号 |
EP2568506(A1) |
申请公布日期 |
2013.03.13 |
申请号 |
EP20110180814 |
申请日期 |
2011.09.09 |
申请人 |
IMEC;KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D |
发明人 |
HEYNS, MARC;HUYGHEBAERT, CEDRIC;VERHULST, ANNE S.;LEONELLI, DANIELE;ROOYACKERS, RITA;DEHAENE, WIM |
分类号 |
H01L29/739;H01L21/8244;H01L29/06;H01L29/78 |
主分类号 |
H01L29/739 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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