发明名称 Fast DCT algorithm for DSP with VLIW architecture
摘要 A single stage computation method to perform a discrete cosine transform operation is provided. The discrete cosine transform operation is performed by executing a plurality of very large instruction words (VLIW) using a digital signal processor. The plurality of very large instruction words includes a first number of multiplications and a second number of additions, where the first number of multiplications is greater than the second number of additions.
申请公布号 US8396916(B2) 申请公布日期 2013.03.12
申请号 US20100787102 申请日期 2010.05.25
申请人 LIU SHIZHONG;QUALCOMM, INCORPORATED 发明人 LIU SHIZHONG
分类号 G06F17/14 主分类号 G06F17/14
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