发明名称 |
DMOS transistor and method of manufacturing the same |
摘要 |
The invention provides a DMOS transistor in which a leakage current is decreased and the source-drain breakdown voltage of the transistor in the off state is enhanced when a body layer is formed by oblique ion implantation. After a photoresist layer 18 is formed, using the photoresist layer 18 and a gate electrode 14 as a mask, first ion implantation is performed toward a first corner portion 14C1 on the inside of the gate electrode 14 in a first direction shown by an arrow A′. A first body layer 17A′ is formed by this first ion implantation. The first body layer 17A′ is formed so as to extend from the first corner portion 14C1 to under the gate electrode 14, and the P-type impurity concentration of the body layer 17A′ in the first corner portion 14C1 is higher than that of a conventional transistor. |
申请公布号 |
US8395210(B2) |
申请公布日期 |
2013.03.12 |
申请号 |
US20080680012 |
申请日期 |
2008.09.26 |
申请人 |
TAKEDA YASUHIRO;OTAKE SEIJI;KIKUCHI SHUICHI;SANYO SEMICONDUCTOR CO., LTD.;SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
发明人 |
TAKEDA YASUHIRO;OTAKE SEIJI;KIKUCHI SHUICHI |
分类号 |
H01L29/78;H01L21/336 |
主分类号 |
H01L29/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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