| 摘要 |
<p>PURPOSE: A method for manufacturing a semiconductor device is provided to prevent a short between a contact hole and a gate pattern, to secure overlay margin, and to control a linewidth of the contact hole by forming a protection spacer in a sidewall of the contact hole. CONSTITUTION: A gate pattern(22) including a gate hard mask(22C) is formed on a substrate(21). An interlayer dielectric layer(24) fills a space between the gate patterns. A first hard mask layer(26) and a second hard mask layer(27) with an etch selectivity with the interlayer dielectric layer are laminated on the interlayer dielectric layer. A first contact hole region and a second contact hole region are defined on the upper side of the gate pattern and the upper side of the substrate by etching the first and second hard mask layers, respectively. A first contact hole(29) is formed by etching the gate hard mask on the lower side of the first contact hole region. A second contact hole(30) is formed by etching the interlayer dielectric layer of the second contact hole region. [Reference numerals] (AA) Secondary etching</p> |
