发明名称 DEVELOPMENT PROCESSING METHOD AND DEVELOPMENT PROCESSING APPARATUS
摘要 According to one embodiment, a monitor pattern is previously exposed together with a device pattern on a resist film, the monitor pattern is developed in a first development condition and a fault occurrence risk is quantified based on a check image. At this time, the range of a second development condition in which the number of faults becomes less than or equal to a permissible value with respect to the quantified fault occurrence risk is determined based on the relationship between fault occurrence risk information and the number of faults. Then, a third development condition in which the pattern dimension becomes a desired value in the second development condition is determined and the device pattern is developed in the thus determined third development condition.
申请公布号 US2013059241(A1) 申请公布日期 2013.03.07
申请号 US201213584954 申请日期 2012.08.14
申请人 SAKURAI HIDEAKI;TERAYAMA MASATOSHI 发明人 SAKURAI HIDEAKI;TERAYAMA MASATOSHI
分类号 G03F7/30;G03B27/52 主分类号 G03F7/30
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