发明名称 SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST
摘要 <p>The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.</p>
申请公布号 WO2013033121(A1) 申请公布日期 2013.03.07
申请号 WO2012US52713 申请日期 2012.08.28
申请人 APPLE INC.;SARCONE, CHRISTOPHER J.;CONROY, DAVID G.;KELLER, JIM 发明人 SARCONE, CHRISTOPHER J.;CONROY, DAVID G.;KELLER, JIM
分类号 G06F11/10 主分类号 G06F11/10
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