发明名称 Electronic device, integrated circuit and method for selecting of an optimal sampling clock phase
摘要 An electronic device comprises a number of sub-systems coupled via an interface. One of the number of sub-systems comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern, operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
申请公布号 US8391415(B2) 申请公布日期 2013.03.05
申请号 US20070522047 申请日期 2007.01.09
申请人 KELLEHER PAUL;MCSWINEY DIARMUID;O'KEEFFE CONOR;FREESCALE SEMICONDUCTOR, INC. 发明人 KELLEHER PAUL;MCSWINEY DIARMUID;O'KEEFFE CONOR
分类号 H03K9/00 主分类号 H03K9/00
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