发明名称 Automated circuit design process for generation of stability constraints for generically defined electronic system with feedback
摘要 A method is described that involves accepting a description of an electronic system having feedback. The method further includes expressing a real root of the electronic system's transfer function and expressing a real part of a complex root of the electronic system's transfer function. The method further includes expressing a time parameter as a maximum of the real root and the real part of a complex root. The method further involves expressing a settling time of the electronic system with the time parameter and using the settling time to automatically generate a design for the electronic system.
申请公布号 US8392857(B2) 申请公布日期 2013.03.05
申请号 US20090631672 申请日期 2009.12.04
申请人 MOHAN SUNDERARAJAN S.;MUTAPCIC ALMIR;OLIVA RICARDO ANTONIO;SYNOPSYS, INC. 发明人 MOHAN SUNDERARAJAN S.;MUTAPCIC ALMIR;OLIVA RICARDO ANTONIO
分类号 G06F9/455 主分类号 G06F9/455
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