发明名称 Chip package with plank stack of semiconductor dies
摘要 In a chip package, semiconductor dies in a vertical stack of semiconductor dies or chips (which is referred to as a plank stack) are separated by a mechanical spacer (such as a filler material or an adhesive). Moreover, the chip package includes a substrate at a right angle to the plank stack, which is electrically coupled to the semiconductor dies along an edge of the plank stack. In particular, electrical pads proximate to a surface of the substrate (which are along a stacking direction of the plank stack) are electrically coupled to pads that are proximate to edges of the semiconductor dies by an intervening conductive material, such as: solder, stud bumps, plated traces, wire bonds, spring connectors, a conductive adhesive and/or an anisotropic conducting film. Note that the chip package may facilitate high-bandwidth communication of signals between the semiconductor dies and the substrate.
申请公布号 US8390109(B2) 申请公布日期 2013.03.05
申请号 US201113029825 申请日期 2011.02.17
申请人 POPOVIC DARKO R.;GIERE MATTHEW D.;GUENIN BRUCE M.;SZE THERESA Y.;SHUBIN IVAN;HARADA JOHN A.;DOUGLAS DAVID C.;SHI JING;ORACLE AMERICA, INC. 发明人 POPOVIC DARKO R.;GIERE MATTHEW D.;GUENIN BRUCE M.;SZE THERESA Y.;SHUBIN IVAN;HARADA JOHN A.;DOUGLAS DAVID C.;SHI JING
分类号 H01L25/07;H01L21/60 主分类号 H01L25/07
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