Delta-sigma modulator circuit for fractional-N phase-locked loop (PLL) frequency synthesizer, has feedback signal input connected with output of correction circuit, for feedback of modified output signal

摘要

The modulator circuit (23) has a signal processing circuit to calculate a predictive value on the basis of the output signal and control signal (Df). The processing circuit compares the calculated prediction value with a first threshold value (Dcp) to modify the output of the modulator circuit, if the calculated reference value is below the first threshold value. The modified output signal is feedback to feedback signal input connected with output of a correction circuit. Independent claims are included for the following: (1) pseudo random sequence generator; (2) fractional-N PLL frequency synthesizer; (3) method for modifying the output signal of a delta sigma modulator circuit; and (4) method for control of a fractional-N PLL frequency synthesizer.