SEMICONDUCTOR DEVICE HAVING REDUNDANT WORD LINES AND REDUNDANT BIT LINES

摘要

Disclosed herein is a device that includes a memory cell array having short and long sides, a row decoder, a row fuse circuit, a column decoder and a column fuse circuit. The row decoder, the row fuse circuit and the column fuse circuit are arranged along the long side of the memory cell array. The column decoder is arranged along the short side of the memory cell array.