发明名称 DRAM SECURITY ERASE
摘要 In a method of erasing data, a wordline of the DRAM array is set active, and signals develop on bitlines according to flows of charge between memory cells coupled to the wordline and the respective bitlines. Sense amplifiers connected to the respective bitlines can remain off such that the sense amplifiers do not amplify the signals to storable signal levels. Thereafter, when the wordline is set inactive again, insufficient charge remains in the memory cells coupled to the wordline to represent data such that the data stored in memory cells coupled to the wordline are erased. These steps can be performed using each of the wordlines of a selected range of the DRAM array or all of the DRAM array so as to erase the data stored in the selected range or in all of the DRAM array.
申请公布号 US2013051127(A1) 申请公布日期 2013.02.28
申请号 US201113291297 申请日期 2011.11.08
申请人 PARRIS MICHAEL C.;TESSERA, INC. 发明人 PARRIS MICHAEL C.
分类号 G11C11/4063 主分类号 G11C11/4063
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