| 摘要 |
A reference A/D conversion unit is connected in parallel to an input common to a time-interleaved A/D converter to be a calibration target, and the output of each unitary A/D conversion unit which makes up the time-interleaved A/D converter is calibrated in a digital region by using a low-speed high-resolution A/D conversion result output from the reference A/D conversion unit. Also, fCLK/N (fCLK represents an overall sampling rate of the time-interleaved A/D converter, and N is relatively prime to the number of unitary A/D conversion units connected in parallel M) is set as the operation clock frequency of the reference A/D conversion unit. Samplings of all unitary A/D conversion units can be sequentially synchronized with the sampling of the reference A/D conversion unit, and the operation clock frequency of the reference A/D converter can be made N times slower than the overall sampling rate of the time-interleaved A/D converter.
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