METHODS AND SYSTEMS FOR MAPPING A PERIPHERAL FUNCTION ONTO A LEGACY MEMORY INTERFACE
摘要
A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.
申请公布号
WO2013028849(A1)
申请公布日期
2013.02.28
申请号
WO2012US52043
申请日期
2012.08.23
申请人
RAMBUS INC.;PEREGO, RICHARD E.;BATRA, PRADEEP;WOO, STEVEN;LAI, LAWRENCE;YEUNG, CHI-MING
发明人
PEREGO, RICHARD E.;BATRA, PRADEEP;WOO, STEVEN;LAI, LAWRENCE;YEUNG, CHI-MING