发明名称 |
EFFICIENT PIPELINE PARALLELISM USING FRAME SHARED MEMORY |
摘要 |
A systems and methods are disclosed that provide an efficient parallel pipeline for data processing using a multi-core processor. Embodiments allocate a shared memory portion of the memory that is accessible from more than one context of execution and/or process a frame in a plurality of processing stages processed by a context of execution. In some embodiments, each of the plurality of processing stages may be bound to a processing core of the multi-core processor. In other embodiments include one or more processing stages with a point-to-point communication mechanism that operates in shared memory.
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申请公布号 |
US2013054938(A1) |
申请公布日期 |
2013.02.28 |
申请号 |
US201213590307 |
申请日期 |
2012.08.21 |
申请人 |
GIACOMONI JOHN;VACHHARAJANI MANISH;THE REGENTS OF THE UNIVERSITY OF COLORADO |
发明人 |
GIACOMONI JOHN;VACHHARAJANI MANISH |
分类号 |
G06F15/76 |
主分类号 |
G06F15/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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